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3 Bit Per Cell NAND Flash

3 bit per cell3 bit-per-cell NAND is sampled out the manufacturers.  The 3 bit per cell is exactly that, 3 bits of information are stored in each NAND cell.  This increased the capacity while keeping the foot print the same size.  This ultimately leads to larger storage capacity at a cheaper price.  Traditionally, SLC [Single Layer Cell] and MLC [Multi Layer Cell] technology is used is USB and SD flash, but we will begin to see TLC [Triple Layer Cell or 3 bit per cell] technology have a full roll-out by the end of this year. Over the past 18 months the biggest problem with TLC is the stability of the memory and performance, but Intel and Micron feel they overcame those problems and ready for production.  More with their press release:

Press Release:

Intel, Micron First to Sample 3-Bit-Per-Cell NAND Flash Memory on Industry-Leading 25-Nanometer Silicon Process Technology Companies Announce Industry’s Highest Capacity, Smallest NAND Device Providing Cost Advantages for a Wide Range of Consumer Storage Applications SANTA CLARA, Calif. and BOISE, Idaho, Aug 17, 2010 (GlobeNewswire via COMTEX News Network) — Intel (Nasdaq:INTC) Corporation and Micron Technology Inc. (Nasdaq:MU) today announced the delivery of 3-bit-per-cell (3bpc) NAND flash memory on 25-nanometer (nm) process technology, producing the industry’s highest capacity, smallest NAND device. The companies have sent initial product samples to select customers. Intel and Micron expect to be in full production by the end of the year. The new 64-gigabit (Gb) 3bpc on 25nm memory device offers improved cost efficiencies and higher storage capacity for the competitive USB, SD (Secure Digital) flash card and consumer electronics markets. Flash memory is primarily used to store data, photos and other multimedia for use in capturing and transferring data between computing and digital devices such as digital cameras, portable media players, digital camcorders and all types of personal computers. These markets are under constant pressure to provide higher capacities at low prices. Designed by the IM Flash Technologies (IMFT) NAND flash joint venture, the 64-Gb, or 8 gigabyte (GB), 25nm lithography stores three bits of information per cell, rather than the traditional one bit (single-level cell) or two bits (multi-level cell). The industry also refers to 3bpc as triple-level cell (TLC.) The device is more than 20 percent smaller than the same capacity of Intel and Micron’s 25nm MLC, which is currently the smallest single 8GB device in production today. Small form-factor flash memory is especially important for consumer end-product flash cards given their intrinsic compact design. The die measures 131mm2 and comes in an industry-standard TSOP package. “With January’s introduction of the industry’s smallest die size at 25nm, quickly followed by the move to 3-bit-per-cell on 25nm, we continue to gain momentum and offer customers a compelling set of leadership products,” said Tom Rampone, Intel vice president and general manager of Intel NAND Solutions Group. “Intel plans to use the design and manufacturing leadership of IMFT to deliver higher-density, cost-competitive products to our customers based on the new 8GB TLC 25nm NAND device.” “As the role of NAND memory continues to escalate in consumer electronics products, we see the early transition to TLC on 25nm as a competitive edge in our growing portfolio of NAND memory products,” said Brian Shirley, vice president of Micron’s NAND Solutions Group. “We are already working to qualify the 8GB TLC NAND flash device within end-product designs, including higher-capacity products from Lexar Media and Micron.” Source:  Micron, News.

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